INTEGRATED OSCILLATOR WITH REDUCED JITTER

Koninklijke Philips Electronics N.V. Groenewoudseweg 1 5621 BA Eindhoven / N (1997). INTEGRATED OSCILLATOR WITH REDUCED JITTER (EP0948837)

Full text not available from this repository. (Request a copy)

In an oscillator in an integrated circuit (IC) the oscillator signal is taken from the output of a comparator (COMP). The decision level of the comparator (CMP) is determined by the voltage difference between the input of the comparator (CMP) and the substrate (SBSTR) of the integrated circuit (IC). The spurious voltage on the substrate (SBSTR), which is caused by digital circuitry (DL), is compensated by means of an equal spurious voltage on the input of the comparator (CMP). To this end an integrated capacitor (C1) is connected between the input of the comparator (CMP) and the substrate (SBSTR). The integrated capacitor (C1) takes the place of the usual external capacitor (C1EXT).

Item Type:	Patent
Division/Institute:	School of Engineering and Computer Science > Institute for Human Centered Engineering (HUCE) School of Engineering and Computer Science BFH Centres and strategic thematic fields > BFH centre for Health technologies
Name:	Daanen, Antonius and Kucera, Martin0000-0002-7350-5398
Language:	English
Submitter:	Martin Kucera
Date Deposited:	17 Dec 2019 08:22
Last Modified:	18 Dec 2020 13:29
URI:	https://arbor.bfh.ch/id/eprint/8717