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  4. INTEGRATED OSCILLATOR WITH REDUCED JITTER
 

INTEGRATED OSCILLATOR WITH REDUCED JITTER

URI
https://arbor.bfh.ch/handle/arbor/30110
Version
Published
Date Issued
1997
Author(s)
Daanen, Antonius
Kucera, Martin  
Type
Patent
Language
English
Abstract
In an oscillator in an integrated circuit (IC) the oscillator signal is taken from the output of a comparator (COMP). The decision level of the comparator (CMP) is determined by the voltage difference between the input of the comparator (CMP) and the substrate (SBSTR) of the integrated circuit (IC). The spurious voltage on the substrate (SBSTR), which is caused by digital circuitry (DL), is compensated by means of an equal spurious voltage on the input of the comparator (CMP). To this end an integrated capacitor (C1) is connected between the input of the comparator (CMP) and the substrate (SBSTR). The integrated capacitor (C1) takes the place of the usual external capacitor (C1EXT).
Publisher URL
https://register.epo.org/application?number=EP98945489&tab=main
Organization
Institute for Human Centered Engineering (HUCE)  
Technik und Informatik  
BFH-Zentrum Technologien in Sport und Medizin  
Submitter
KuceraM
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